1. Field of the Invention
The present invention is related to processor integrated circuits, and more specifically to a trace array circuit having features that reduce power consumption of the processor.
2. Description of Related Art
Power consumption in processors and other very-large-scale integrated (VLSI) circuits is managed in design and dynamically in order to reduce energy use in the systems in which the circuits are installed, and also in managing generated heat due to power dissipation. While the functional units in processors are typically optimized to reduce power consumption, other units within processors that are frequently active during operation can benefit from designs that reduce power consumption, and techniques that intelligently manage those other units to manage power consumption.
One type of other unit that is typically present in a processor is a trace array. Trace arrays are used to gather processor state information during execution of a program for subsequent analysis of the program, the processor logic, or other conditions of the operating environment that cause changes in the state of the processor. Trace arrays in modern processors are ubiquitous, with large numbers of trace arrays gathering the state information at different locations within an integrated circuit die that will typically contain several processors. Since the trace arrays are gathering data constantly, the trace array power consumption/power dissipation can be a substantial component in the total power consumption/power dissipation, especially when the design of the functional units is power-optimized.
It would therefore be desirable to provide a processor and trace array circuit having reduced power consumption.